Sunday, October 19, 2008

Intel processors: History

For years, Intel customers came to expect a doubling of performance every 18-24 months in accordance with oore’s Law. Most of these performance gains came from dramatic increases in frequency (from 5 MHz to 3 GHz in the years from 1983 to 2002) and through process technology advancements. Improvements also came from increases in instructions per cycle (IPC). By 2002, however, increasing power densities and the resultant heat began to reveal some limitations in using predominately frequency as a way of improving performance. So, while Moore’s Law frequency increases, and IPC improvements continue to play an important role in performance increases, new thinking is also required. The best example of this new thinking is multi-core processors. By putting multiple execution cores into a single processor (as well as continuing to increase clock frequency), Intel is able to provide even greater multiples of processing power.




Using multi-core processors, Intel can dramatically increase a computer’s capabilities and computing resources, providing better responsiveness, improving multithreaded throughput, and delivering the advantages of parallel computing to properly threaded mainstream applications.

A New Cadence for Technological Advancement Building on the foundation of Intel Core microarchitecture (introduced in 2006), Intel is establishing a new cadence that will speed up the delivery of products featuring superior performance and energy-efficiency for years to come. Intel plans to deliver a new, optimized energy-efficient performance microarchitecture approximately every two years that supports all its process technology advancements. For instance, in late 2007, Intel process technology will transition to 45 nm and effectively double the number of transistors in a given die size.

In 2008 Intel will follow this gain with a new microarchitecture codenamed “Nehalem” expected to deliver new capabilities and several percentage-point improvements in performance and energy-efficiency. This cycle will then move on to 32 nm and another new microarchitecture targeted for 2010.

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